Intermittent Computing Emulation of Ultralow-Power Processors: Evaluation of Backup Strategies for RISC-V

Author:

Philip Sebin Shaji1ORCID,Passerone Roberto1ORCID,Yildirim Kasim Sinan1ORCID,Brunelli Davide2ORCID

Affiliation:

1. Department of Information Engineering and Computer Science, University of Trento, Trento, Italy

2. Department of Industrial Engineering, University of Trento, Povo, Italy

Funder

Italian Ministry for University and Research

Dipartimenti di Eccellenza

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Reference40 articles.

1. Idetic: A high-level synthesis approach for enabling long computations on transiently-powered ASICs

2. Intermittent computation without hardware support or programmer intervention;van der woude;Proc OSDI,2016

3. Clank

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