TRAVERSAL: A Fast and Adaptive Graph-Based Placement and Routing for CGRAs

Author:

Canesche MichaelORCID,Menezes MarceloORCID,Carvalho WesterleyORCID,Torres Frank SillORCID,Jamieson PeterORCID,Nacif Jose AugustoORCID,Ferreira RicardoORCID

Funder

Deutsche Forschungsgemeinschaft

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior—Brasil—Finance Code 001

FAPEMIG

National Council for Scientific and Technological Development

Intel Academic Compute Environment

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. An ASIC Accelerator for QNN With Variable Precision and Tunable Energy Efficiency;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-07

2. HierCGRA: A Novel Framework for Large-scale CGRA with Hierarchical Modeling and Automated Design Space Exploration;ACM Transactions on Reconfigurable Technology and Systems;2024-05-10

3. Data Flow Graph Partitioning Method for CGRA Temporal Mapping Based on Bayesian Optimization;2024 Conference of Science and Technology for Integrated Circuits (CSTIC);2024-03-17

4. GCN-RA: A graph convolutional network-based resource allocator for reconfigurable systems;Journal of Computational Science;2023-12

5. MapZero: Mapping for Coarse-grained Reconfigurable Architectures with Reinforcement Learning and Monte-Carlo Tree Search;Proceedings of the 50th Annual International Symposium on Computer Architecture;2023-06-17

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