A 12b 1.7GS/s two-times interleaved DAC with <-62dBc IM3 across Nyquist using a single 1.2V supply-Reference-Cited by-同舟云学术

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A 12b 1.7GS/s two-times interleaved DAC with <-62dBc IM3 across Nyquist using a single 1.2V supply

Published:2013-11 Issue: Volume: Page:
ISSN:
Container-title:2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)
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Author:

Olieman Erik,Annema Anne-Johan,Nauta Bram,Bal Ankur,Singh Pratap Narayan

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6679622/6690965/06690987.pdf?arnumber=6690987

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Low-Power 10-Bit 2GS/s Hybrid Time-Interleaved Digital-to-Analog Converter with a New Neutrolized-Glitch Unit Current Cell in 65 nm CMOS Technology;Circuits, Systems, and Signal Processing;2024-08-10

2. Frequency Interleaved DAC System Design: Fundamental Problems and Compensation Methods;Proceedings of Eighth International Congress on Information and Communication Technology;2023

3. A 7 bit, 3 GHz bandwidth random-time-interleaved-hybrid DAC using a novel self-healing structure for DCE in 65 nm CMOS technology;AEU - International Journal of Electronics and Communications;2021-05

4. A 12 bit 250MS/s 28mW +70dB SFDR non-50% RZ DAC in 0.11µm CMOS using controllable RZ window for wireless SoC integration;Microelectronics Journal;2016-10

5. An Interleaved Full Nyquist High-Speed DAC Technique;IEEE Journal of Solid-State Circuits;2015-03

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