A 3mW 12b 10MS/s sub-range SAR ADC-Reference-Cited by-同舟云学术

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A 3mW 12b 10MS/s sub-range SAR ADC

Published:2009-11 Issue: Volume: Page:
ISSN:
Container-title:2009 IEEE Asian Solid-State Circuits Conference
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Author:

Chen Hung-Wei,Liu Yu-Hsun,Lin Yu-Hsiang,Chen Hsin-Shu

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5351184/5357143/05357201.pdf?arnumber=5357201

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 12-b 2 MS/s R-C Two-Step SAR ADC with Bit-Cycling Time Control and LSB Correction Logic;2020 International SoC Design Conference (ISOCC);2020-10-21

2. An 11-bit 200 MS/s subrange SAR ADC with low-cost integrated reference buffer;Journal of Semiconductors;2017-10

3. Linearity analysis of single-ended SAR ADC with split capacitive DAC;IOP Conference Series: Materials Science and Engineering;2016-10

4. 22 μm-pitch 9-bit Column-Parallel Overlapping-Subrange SAR (CPOSSAR) ADC;Microelectronics Journal;2015-09

5. Design of a low power 10 bit 300 ksps multi-channel SAR ADC for wireless sensor network applications;Journal of Semiconductors;2015-04

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