Author:
Sreelakshmi P,Pande Kirti S.,Murty N. S.
Cited by
4 articles.
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1. Robust Body Biased Level Shifter;2023 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER);2023-10-13
2. Optimized Hazard Free Pipelined Architecture Block for RV32I RISC-V Processor;2022 3rd International Conference on Smart Electronics and Communication (ICOSEC);2022-10-20
3. A Cascode Current Mirror Based 90 mV to 1.8 V Level Shifter with Alleviated Delay;2022 International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics ( DISCOVER);2022-10-14
4. MTCMOS 8T SRAM Cell with Improved Stability and Reduced Power Consumption;2021 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER);2021-11-19