A 128ksps 120dB THD Low Noise Analog Front End
Author:
Affiliation:
1. Analog Devices,Valencia,Spain
2. Analog Devices,Limerick,Ireland
3. Analog Devices,Turin,Italy
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9911257/9911222/09911425.pdf?arnumber=9911425
Reference6 articles.
1. A Capacitively Coupled CT Δ ΣM With Chopping Artifacts Rejection for Sensor Readout ICs
2. An Energy-Efficient 3.7-nV/ $\surd$ Hz Bridge Readout IC With a Stable Bridge Offset Compensation Scheme
3. A 6 $\mu$ W 95 dB SNDR Inverter Based $\Sigma\Delta$ Modulator With Subtractive Dithering and SAR Quantizer
4. A 100dB SNR 2.5MS/s output data $\Delta\Sigma$ ADC;brewer;ISSCC 2005 IEEE International Digest of Technical Papers Solid-State Circuits Conference,0
5. A 22-bit Read-Out IC With 7-ppm INL and Sub-100-$\mu$ Hz 1/$f$ Corner for DC Measurement Systems
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