A 0.4V 12b Comparator Offset Injection Assisted SAR ADC achieving 0.425 fJ/conv-step
Author:
Affiliation:
1. National University of Singapore,Singapore
Funder
National Research Foundation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10268677/10268683/10268816.pdf?arnumber=10268816
Reference14 articles.
1. A 0.82mW 14b 130MS/S Pipelined-SAR ADC With a Distributed Averaging Correlated Level Shifting (DACLS) Ringamp and Bypass-Window Backend
2. 11.1 An oversampled 12/14b SAR ADC with noise reduction and linearity enhancements achieving up to 79.1dB SNDR
3. ADC Performance Survey 1997-2022;murmann;[Online] Available,0
4. A 2.2/2.7fJ/conversion-step 10/12b 40kS/s SAR ADC with Data-Driven Noise Reduction
5. Offset cancellation by biasing the body of a transistor;xu;US8400337B1 Mar 19 2013,0
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