A 2MHz-BW 96.8dB-SNDR 98dB-SNR CT-Zoom ADC With Residue Feedforward, Redundancy and Fully LMS-Based Calibration
Author:
Affiliation:
1. Fudan University,State Key Laboratory of Integrated Chips and Systems,Shanghai,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10268677/10268683/10268716.pdf?arnumber=10268716
Reference10 articles.
1. Calibration of DAC Mismatch Errors in $\Sigma\Delta$ ADCs Based on a Sine-Wave Measurement
2. 10.1 A116 ?W104.4 dB-DR 100.6dB-SNDR CT ?? Audio ADC Using Tri-Level Current-Steering DAC with Gate-Leakage Compensated Off-Transistor-Based Bias Noise Filter;lo;Digest of ISSCC,2021
3. 15.2 A 4.5mW CT self-coupled ΔΣ modulator with 2.2MHz BW and 90.4dB SNDR using residual ELD compensation
4. A 13-ENOB, 5 MHz BW, 3.16 mW multi-bit continuous-time ΔΣ ADC in 28 nm CMOS with excess-loop-delay compensation embedded in SAR quantizer
5. A 72.6 dB-SNDR 100 MHz-BW 16.36 mW CTDSM with preliminary sampling and quantization scheme in backend subranging QTZ;wang;Digest of ISSCC,2019
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