microASR: 32-μW Real-Time Automatic Speech Recognition Chip featuring a Bio-Inspired Neuron Model and Digital SRAM-based Compute-In-Memory Hardware
Author:
Affiliation:
1. Columbia University,Department of Electrical Engineering,New York,NY,USA
2. Intel,Portland,OR,USA
Funder
Semiconductor Research Corporation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10268677/10268683/10268739.pdf?arnumber=10268739
Reference12 articles.
1. Convolutional networks for fast, energy-efficient neuromorphic computing
2. 9.8 A 25mm2 SoC for IoT Devices with 18ms NoiseRobust Speech-to-Text Latency via Bayesian Speech Denoising and Attention-Based Sequence-to-Sequence DNN Speech Recognition in 16nm FinFET;tambe;ISSCC,2021
3. ReckOn: A 28nm Sub-mm2 Task-Agnostic Spiking Recurrent Neural Network Processor Enabling On-Chip Learning over Second-Long Timescales
4. 16.4 An 89TOPS/W and 16.3TOPS/mm2 All-Digital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications
5. Online Spatio-Temporal Learning in Deep Neural Networks
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