1. A 0.021mm2,65nm CMOS 2.5GHz Digital Injection-Locked Clock Multiplier with Injection Pulse Shaping Achieving -79dBc Reference Spur and 0.496mW/GHz Power Efficiency;xu;IEEE ISSCC Dig Tech Papers,2022
2. A 0.4-V, 500MHz, Ultra-Low-Power Phase-Locked Loop for Near-Threshold Voltage Operation;moon;IEEE Custom Integr Circuits Conf,2014
3. A 0.17-to-3.5mW 0.15-to-5GHz SoC PLL with 15dB Built-In Supply Noise Rejection and Self-Bandwidth Control in 14nm CMOS;shen;IEEE ISSCC Dig Tech Papers,2016
4. A 140fsrms-Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope Calibrator;yoo;IEEE ISSCC Dig Tech Papers,2019
5. A 0.9–2.25-GHz Sub-0.2-mW/GHz Compact Low-Voltage Low-Power Hybrid Digital PLL With Loop Bandwidth-Tracking Technique