A TCAD simulation-based analysis of the asymmetrically designed channel effects on double gate-junctionless field-effect nanowire transistor
Author:
Affiliation:
1. North-Eastern Hill University,Department of Electronics and Communication Engineering,Shillong,India,793022
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10127223/10127224/10127541.pdf?arnumber=10127541
Reference11 articles.
1. Quantum mechanical analysis on modeling of surface potential and drain current for nanowire jlfet;bora;Nano Research,2020
2. An approach for complete 2-D analytical potential modelling of fully depleted symmetric double gate junction less transistor;chandra;J Comput Electron,2015
3. 2-D Quantum Confined Threshold Voltage Shift Model for Asymmetric Short-Channel Junctionless Quadruple-Gate FETs
4. Performance Analysis of a Double-Gate Junctionless Transistor with Varied Doping and Gate Underlap using Device Simulator
5. A Complete Analytical Model of Surface Potential and Drain Current for an Ultra Short Channel Double Gate Asymmetric Junctionless Transistor
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