BEOL-Compatible Superlattice FEFET Analog Synapse With Improved Linearity and Symmetry of Weight Update

Author:

Aabrar Khandker Akif1ORCID,Kirtania Sharadindu Gopal1ORCID,Liang Fu-Xiang1,Gomez Jorge1ORCID,Jose Matthew San1,Luo Yandong2ORCID,Ye Huacheng1ORCID,Dutta Sourav1ORCID,Ravikumar Priyankka G.3,Ravindran Prasanna Venkatesan4ORCID,Khan Asif Islam5ORCID,Yu Shimeng6ORCID,Datta Suman1ORCID

Affiliation:

1. Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, USA

2. Georgia Institute of Technology, Atlanta, GA, USA

3. Department of Electrical Engineering, Indian Institute of Technology, Palakkad, Palakkad, Kerala, India

4. School of Electrical and Computer Engineering, Georgia Institute of Technology College of Engineering, Atlanta, GA, USA

5. School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA

6. Department of ECE, Georgia Institute of Technology, Atlanta, GA, USA

Funder

ASCENT, one of six centers in JUMP

DARPA and the Semiconductor Research Corporation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Reference35 articles.

1. Ferroelectric Analog Synaptic Transistors

2. Monolithic integration of AgTe/TiO2 based threshold switching device with TiN liner for steep slope field-effect transistors;song;IEDM Tech Dig,2016

3. Neuromorphic speech systems using advanced ReRAM-based synapse;park;IEDM Tech Dig,2013

4. A Methodology to Improve Linearity of Analog RRAM for Neuromorphic Computing

5. Exploiting Hybrid Precision for Training and Inference: A 2T-1FeFET Based Analog Synaptic Weight Cell

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