A Fully Analytical Current Model for Gate–Source Overlap Tunneling FETs as the Ternary Devices
Author:
Affiliation:
1. State Key Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an, China
2. School of Physics and Information Engineering, Shanxi Normal University, Linfen, China
Funder
National Natural Science Foundation of China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/9901396/09853222.pdf?arnumber=9853222
Reference35 articles.
1. Trap Assisted Tunneling and Its Effect on Subthreshold Swing of Tunnel FETs
2. Impact of field-induced quantum confinement in tunneling field-effect devices
3. Optimization of Gate-on-Source-Only Tunnel FETs With Counter-Doped Pockets
4. A Compact 2-D Analytical Model for Electrical Characteristics of Double-Gate Tunnel Field-Effect Transistors With a SiO2/High- $k$ Stacked Gate-Oxide Structure
5. A Comparative Study on the Impacts of Interface Traps on Tunneling FET and MOSFET
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1. A Study on Dual-Gate Dielectric Face Tunnel Field-Effect Transistor for Ternary Inverter;Nanomaterials;2024-08-03
2. Multi-state tunnel field effect transistor based on face tunneling with gate-source overlap;Solid-State Electronics;2023-03
3. A Novel Dopingless Ternary FET With the Metal Source for Ternary Inverter Implementation;IEEE Transactions on Nanotechnology;2023
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