Impact of Back-Gate Biasing on the Transport Properties of 22 nm FD-SOI MOSFETs at Cryogenic Temperatures
Author:
Affiliation:
1. School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, AZ, USA
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/9901396/09867946.pdf?arnumber=9867946
Reference47 articles.
1. Effect of gate impurity concentration on inversion-layer mobility in MOSFETs with ultrathin gate oxide layer
2. Carrier transport in HfO/sub 2//metal gate MOSFETs: physical insight into critical parameters
3. Compact Models and the Physics of Nanoscale FETs
4. Virtual-Source-Based Self-Consistent Current and Charge FET Models: From Ballistic to Drift-Diffusion Velocity-Saturation Operation
5. Back-gate effects on DC performance and carrier transport in 22 nm FDSOI technology down to cryogenic temperatures
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Cryogenic Body Bias Effect in DRAM Peripheral and Buried-Channel-Array Transistor for Quantum Computing Applications;IEEE Access;2024
2. Evidence of Transport Degradation in 22 nm FD-SOI Charge Trapping Transistors for Neural Network Applications;Solid-State Electronics;2023-11
3. Novel Approach to FDSOI Threshold Voltage Model Validated at Cryogenic Temperatures;IEEE Access;2023
4. Evidence of Transport Degradation in 22 Nm Fd-Soi Charge Trapping Transistors for Neural Network Applications;2023
5. Radiation-induced Enhancement of Scattering Effects in FD-SOI MOSFETs;2022 22nd European Conference on Radiation and Its Effects on Components and Systems (RADECS);2022-10-03
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