Cryogenic Body Bias Effect in DRAM Peripheral and Buried-Channel-Array Transistor for Quantum Computing Applications
Author:
Affiliation:
1. Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Republic of Korea
2. Memory Division, Quality Assurance Team, Samsung Electronics Company Ltd., Hwaseong-si, Republic of Korea
Funder
Semiconductor Industry Collaborative Project between the Pohang University of Science and Technology
Samsung
Ministry of Trade, Industry, and Energy
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Link
http://xplorestaging.ieee.org/ielx7/6287639/10380310/10398173.pdf?arnumber=10398173
Reference25 articles.
1. Cryo-CMOS for quantum computing
2. Cryogenic-DRAM based memory system for scalable quantum computers
3. Cryogenic memory technologies
4. Cryogenic MOS Transistor Model
5. Physical Model of Low-Temperature to Cryogenic Threshold Voltage in MOSFETs
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