Compact Modeling of Nonideal Trapping/Detrapping Processes in GaN Power Devices
Author:
Affiliation:
1. Department of Information Engineering, Università degli Studi di Padova, Padua, Italy
2. CMST, IMEC, Ghent University, Ghent, Belgium
3. IMEC VZW, Leuven, Belgium
Funder
iRel40 Project
Electronics Components andSystems for European Leadership (ECSEL) Joint Undertaking
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/9839401/09810950.pdf?arnumber=9810950
Reference29 articles.
1. Investigating the Current Collapse Mechanisms of p-GaN Gate HEMTs by Different Passivation Dielectrics
2. Cumulative Hot-Electron Trapping in GaN-Based Power HEMTs Observed by an Ultra-Fast (10V/ns) on-Wafer Methodology
3. Mechanism of Threshold Voltage Shift in ${p}$ -GaN Gate AlGaN/GaN Transistors
4. Lucky-electron model of channel hot-electron injection in MOSFET's;tam;IEEE Trans Electron Devices,1984
5. Impact of carbon in the buffer on power switching GaN-on-Si and RF GaN-on-SiC HEMTs
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3. On the CET-Map Ill-Posed Inversion Problem: Theory and Application to GaN HEMTs;IEEE Transactions on Electron Devices;2023
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