String Current Compensation Method in VNAND Flash for Hardware-Based BNNs-Reference-Cited by-同舟云学术

String Current Compensation Method in VNAND Flash for Hardware-Based BNNs

Published:2022-12 Issue:12 Volume:69 Page:6717-6721
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Back Jong-Won¹^ORCID,Yoo Ho-Nam¹^ORCID,Kim Jaehyeon¹,Park Min-Kyu¹^ORCID,Choi Woo Young¹^ORCID,Lee Jong-Ho¹^ORCID

Affiliation:

1. Department of Electrical and Computer Engineering, Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, South Korea

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/9967813/09935567.pdf?arnumber=9935567

Reference13 articles.

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4. Characterization and analysis of bit errors in 3D TLC NAND flash memory: Semantic scholar;papandreou;Proc IEEE Int Rel Phys Symp (IRPS),2019

5. Fully hardware-implemented memristor convolutional neural network;yao;Nature,2020

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