Cell-Based Aging Sensor Using Built-In Speed Grading
Author:
Affiliation:
1. National Tsing Hua University,Electrical Engineering Department,Taiwan
Funder
National Science and Technology Council
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10305276/10305441/10305452.pdf?arnumber=10305452
Reference22 articles.
1. High-frequency, at-speed scan testing
2. A wide-range clock signal generation scheme for speed grading of a logic core
3. Failing Frequency Signature Analysis
4. Enhanced launch-off-capture transition fault testing
5. Just-Enough Stress Test for Infant-Mortality Screening Using Speed Binning
Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Low-Jitter Frequency Doubling Circuit Supporting Higher-Speed BISG and Aging Sensing in a Chiplet-Based Design Environment;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024
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