A Novel FPGA-Based Delay-Line Implementation and Interpolation Method Using TDCs-Reference-Cited by-同舟云学术

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A Novel FPGA-Based Delay-Line Implementation and Interpolation Method Using TDCs

Published:2023-11-02 Issue: Volume: Page:1-6
ISSN:
Container-title:2023 International Conference on Sensing, Measurement & Data Analytics in the era of Artificial Intelligence (ICSMD)
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Author:

Sun Xinyue¹,Shi Yuchen¹,Li Jiawei¹,Ren Yichen¹,Zhao Ergang¹,Yue Zhao²

Affiliation:

1. College of Electronic Information and Optical Engineering, Nankai University,Tianjin,China

2. College of Electronic Information and Optical Engineering, Smart Sensing Interdisciplinary Science Center of Nankai University, Tianjin Key Laboratory of Optoelectronic Sensor and Sensing Network Technology, Nankai University,Tianjin,China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10490445/10490449/10490980.pdf?arnumber=10490980

Reference16 articles.

1. A 4.7-ps Resolution Recirculating Cyclic Vernier TDC Using DWA-Based Mismatch Correction and a Register-Based Time Amplifier

2. A Novel Time-to-Amplitude Converter and a Low-Cost Wide Dynamic Range FPGA TDC for LiDAR Application

3. A Reconfigurable 5-Channel Ring-Oscillator-Based TDC for Direct Time-of-Flight 3D Imaging

4. A 9 ps DNL/INL/RMS FPGA-Based Sigma Accumulation TDC with Unlimited Dynamic Range for Time-Based Analog Front End Applications

5. A 0.6-V 13-bit 20-MS/s Two-Step TDC-Assisted SAR ADC With PVT Tracking and Speed-Enhanced Techniques

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