Reconfigurable instruction set processors: a survey-Reference-Cited by-同舟云学术

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Reconfigurable instruction set processors: a survey

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Container-title:Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path from Specification to Prototype (Cat. No.PR00668)
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Author:

Barat F.,Lauwereins R.

Publisher

IEEE Comput. Soc

Link

http://xplorestaging.ieee.org/ielx5/6906/18573/00855217.pdf?arnumber=855217

Cited by 18 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. FlexBex: A RISC-V with a Reconfigurable Instruction Extension;2020 International Conference on Field-Programmable Technology (ICFPT);2020-12

2. Allocating resources based on a model of coarse‐grained reconfigurable architecture;The Journal of Engineering;2019-07-12

3. Optimization of a novel programmable data-flow crypto processor using NSGA-II algorithm;Journal of Advanced Research;2018-07

4. Performance Enhancement of MRPSOC for Multimedia Applications;System and Architecture;2018

5. A Methodology to Adapt Data Path Architectures to a MIPS-1 Model;2012 Brazilian Symposium on Computing System Engineering;2012-11

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