Fixed-phase retiming for low power design
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx3/3976/11465/00547519.pdf?arnumber=547519
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2. Partition Based Product Term Retiming for Reliable Low Power Logic Structure;Advances in Intelligent Systems and Computing;2018-12-06
3. Time-borrowing platform in the Xilinx UltraScale+ family of FPGAs and MPSoCs;2016 26th International Conference on Field Programmable Logic and Applications (FPL);2016-08
4. RTL2RTL Formal Equivalence: Boosting the Design Confidence;Electronic Proceedings in Theoretical Computer Science;2014-07-08
5. Latch-Based Performance Optimization for Field-Programmable Gate Arrays;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2013-05
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