Process integration of 3D Si interposer with double-sided active chip attachments-Reference-Cited by-同舟云学术

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Process integration of 3D Si interposer with double-sided active chip attachments

Published:2013-05 Issue: Volume: Page:
ISSN:
Container-title:2013 IEEE 63rd Electronic Components and Technology Conference
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Author:

Tzeng Pei-Jer,Lau John H.,Zhan Chau-Jie,Hsin Yu-Chen,Chang Po-chih,Chang Yiu-Hsiang,Chen Jui-Chin,Chen Shang-Chun,Wu Chien-Ying,Lee Ching-Kuan,Chang Hsiang-Hung,Chien Chun-Hsien,Lin Cha-Hsin,Ku Tzu-Kun,Kao Ming-Jer,Li Ming,Cline Julia,Saito Keisuke,Ji Mandy

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6573226/6575533/06575555.pdf?arnumber=6575555

Cited by 18 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Demonstration and Challenges of Through Si Interposer (TSI) with 5-layer Frontside Cu Metal and 2-layer Backside Cu RDL;2023 IEEE 25th Electronics Packaging Technology Conference (EPTC);2023-12-05

2. A Novel Packaging Solution for Photonic Engine Application;2023 IEEE 25th Electronics Packaging Technology Conference (EPTC);2023-12-05

3. Design of Circuits and Packaging Systems for Security Chips;IEICE Transactions on Electronics;2023-07-01

4. Recent Advances and Trends in Chiplet Design and Heterogeneous Integration Packaging;Journal of Electronic Packaging;2023-06-23

5. A Si-Interposer with Buried Cu Metal Stripes and Bonded to Si-Substrate Backside for Security IC Chips;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05

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