Transistor reliability characterization and comparisons for a 14 nm tri-gate technology optimized for System-on-Chip and foundry platforms-Reference-Cited by-同舟云学术

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Transistor reliability characterization and comparisons for a 14 nm tri-gate technology optimized for System-on-Chip and foundry platforms

Published:2016-04 Issue: Volume: Page:
ISSN:
Container-title:2016 IEEE International Reliability Physics Symposium (IRPS)
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Author:

Prasad C.,Park K. W.,Chahal M.,Meric I.,Novak S. R.,Ramey S.,Bai P.,Chang H.-Y.,Dias N. L.,Hafez W. M.,Jan C.-H.,Nidhi N.,Olac-vaw R. W.,Ramaswamy R.,Tsai C.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7565237/7574493/07574536.pdf?arnumber=7574536

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Investigation of Electrothermal Characteristics in Silicon Forksheet FETs for Sub-3-nm Node;IEEE Transactions on Electron Devices;2023-12

2. Multi-physics Simulations for Nanoscale CMOS Reliability;2023 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD);2023-09-27

3. A detailed comparison of various off-state breakdown methodologies for scaled Tri-gate technologies;2023 IEEE International Reliability Physics Symposium (IRPS);2023-03

4. Q&R On-Chip (QROC): A Unified, Oven-less and Scalable Circuit Reliability Platform;2022 IEEE International Reliability Physics Symposium (IRPS);2022-03

5. Method to evaluate off-state breakdown in scaled Tri-gate technologies;2022 IEEE International Reliability Physics Symposium (IRPS);2022-03

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