Investigation of Electrothermal Characteristics in Silicon Forksheet FETs for Sub-3-nm Node

Author:

Lim Jaewan1ORCID,Jeong Jinsu1ORCID,Lee Junjong1ORCID,Lee Seunghwan1ORCID,Lee Sanguk1ORCID,Ahn Yonghwan1ORCID,Baek Rock-Hyun1ORCID

Affiliation:

1. Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, South Korea

Funder

Ministry of Trade, Industry and Energy

Korea Semiconductor Research Consortium (KSRC) for the Development for the Future Semiconductor Device

POSTECH-Samusng Electronics Industry-Academia Cooperative Research Center

National Research Foundation of Korea (NRF) through the Korea government

BK21 FOUR Program

EDA Tool, IC Design Education Center, South Korea

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

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1. Ultra-scaled CMOS devices and technology;Reference Module in Materials Science and Materials Engineering;2024

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