SpArch: Efficient Architecture for Sparse Matrix Multiplication
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9044284/9065293/09065428.pdf?arnumber=9065428
Cited by 127 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. StarSPA: Stride-Aware Sparsity Compression for Efficient CNN Acceleration;IEEE Access;2024
2. Algorithm/Hardware Co-Optimization for Sparsity-Aware SpMM Acceleration of GNNs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-12
3. An Efficient Gustavson-Based Sparse Matrix–Matrix Multiplication Accelerator on Embedded FPGAs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-12
4. Symphony: Orchestrating Sparse and Dense Tensors with Hierarchical Heterogeneous Processing;ACM Transactions on Computer Systems;2023-11-30
5. SAGA: Sparsity-Agnostic Graph Convolutional Network Acceleration with Near-Optimal Workload Balance;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28
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