The Cost of Flexibility: Embedded versus Discrete Routers in CGRAs for HPC

Author:

Adhi Boma1,Cortes Carlos1,Tan Yiyu2,Kojima Takuya1,Podobas Artur3,Sano Kentaro1

Affiliation:

1. Center for Computational Science (R-CCS),RIKEN,Japan

2. Iwate University,Science and Engineering Department of Systems Innovation Engineering,Japan

3. KTH Royal Institute of Technology,Sweden

Funder

New Energy and Industrial Technology Development Organization

Japan Society for the Promotion of Science

Publisher

IEEE

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Coarse-grained reconfigurable architectures for radio baseband processing: A survey;Journal of Systems Architecture;2024-09

2. Exploration of Trade-offs Between General-Purpose and Specialized Processing Elements in HPC-Oriented CGRA;2024 IEEE International Parallel and Distributed Processing Symposium (IPDPS);2024-05-27

3. Mapping Enumeration for Multi-Context CGRAs Using Zero-Suppressed Binary Decision Diagrams;2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2024-05-05

4. Efficient Deadlock Avoidance for 2-D Mesh NoCs That Use OQ or VOQ Routers;IEEE Transactions on Computers;2024-05

5. Exploration of Compute vs. Interconnect Tradeoffs in CGRAs for HPC;Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies;2023-06-14

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