Exploration of Compute vs. Interconnect Tradeoffs in CGRAs for HPC-Reference-Cited by-同舟云学术

Exploration of Compute vs. Interconnect Tradeoffs in CGRAs for HPC

Published:2023-06-14 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies
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Author:

Anderson Jason¹^ORCID,Adhi Boma²^ORCID,Cortes Carlos²^ORCID,Sozzo Emanuele Del²^ORCID,Ragheb Omar¹^ORCID,Sano Kentaro²^ORCID

Affiliation:

1. University of Toronto, Canada

2. RIKEN, Japan

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3597031.3597055

Reference29 articles.

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3. Boma Adhi Carlos Cortes Yiyu Tan Takuya Kojima Artur Podobas and Kentaro Sano. 2022. Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluations. In The First International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing (CGRA4HPC). Boma Adhi Carlos Cortes Yiyu Tan Takuya Kojima Artur Podobas and Kentaro Sano. 2022. Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluations. In The First International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing (CGRA4HPC).

4. Boma Adhi , Carlos Cortes , Tomohiro Ueno , Yiyu Tan , Takuya Kojima , Artur Podobas , and Kentaro Sano . 2022. Exploring Inter-tile Connectivity for HPC-oriented CGRA with Lower Resource Usage . In IEEE FPT. Boma Adhi, Carlos Cortes, Tomohiro Ueno, Yiyu Tan, Takuya Kojima, Artur Podobas, and Kentaro Sano. 2022. Exploring Inter-tile Connectivity for HPC-oriented CGRA with Lower Resource Usage. In IEEE FPT.

5. EGRA: A Coarse Grained Reconfigurable Architectural Template;Ansaloni Giovanni;IEEE TVLSI,2011

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