Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip-Reference-Cited by-同舟云学术

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Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip

Published:2008 Issue: Volume: Page:
ISSN:
Container-title:2008 International Conference on Field Programmable Logic and Applications
language:
Short-container-title:

Author:

Shelburne M.,Patterson C.,Athanas P.,Jones M.,Martin B.,Fong R.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/4625340/4629890/04629941.pdf?arnumber=4629941

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. XBERT: Xilinx Logical-Level Bitstream Embedded RAM Transfusion;2021 IEEE 29th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2021-05

2. System-Level Design of Networks-on-Chip for Heterogeneous Systems-on-Chip;Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip;2017-10-19

3. Reconfigurable Multiprocessor Systems-on-Chip;Computing Platforms for Software-Defined Radio;2016-12-30

4. On the Impact of Replacing Low-Speed Configuration Buses on FPGAs with the Chip’s Internal Configuration Infrastructure;ACM Transactions on Reconfigurable Technology and Systems;2015-11-24

5. Microkernel Architecture and Hardware Abstraction Layer of a Reliable Reconfigurable Real-Time Operating System (R3TOS);ACM Transactions on Reconfigurable Technology and Systems;2015-03-06

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