An 18Gb/s duobinary receiver with a CDR-assisted DFE
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/4926119/4977283/04977414.pdf?arnumber=4977414
Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A 0.45 pJ/b 24 Gb/s NRZ Receiver Data-Path Using Half-Baud-Rate Duobinary Sampling;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-09
2. A 21-Gb/s Duobinary Transceiver for GDDR Interfaces With an Adaptive Equalizer;IEEE Journal of Solid-State Circuits;2022-10
3. A 21Gb/s Duobinary Transceiver for GDDR interfaces with an Adaptive Equalizer;2021 IEEE Asian Solid-State Circuits Conference (A-SSCC);2021-11-07
4. A 12-Gb/s 10-ns Turn-On Time Rapid ON/OFF Baud-Rate DFE Receiver in 65-nm CMOS;IEEE Journal of Solid-State Circuits;2020-08
5. A Body Channel Communication Technique Utilizing Decision Feedback Equalization;IEEE Access;2020
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