A 65nm Embedded SRAM with Wafer-Level Burn-In Mode, Leak-Bit Redundancy and E-Trim Fuse for Known Good Die-Reference-Cited by-同舟云学术

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A 65nm Embedded SRAM with Wafer-Level Burn-In Mode, Leak-Bit Redundancy and E-Trim Fuse for Known Good Die

Published:2007-02 Issue: Volume: Page:
ISSN:
Container-title:2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers
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Author:

Ohbayashi Shigeki,Yabuuchi Makoto,Kono Kazushi,Oda Yuji,Imaoka Susumu,Usui Keiichi,Yonezu Toshiaki,Iwamoto Takeshi,Nii Koji,Tsukamoto Yasumasa,Arakawa Masashi,Uchida Takahiro,Okada Masakazu,Ishii Atsushi,Makino Hiroshi,Ishibashi Koichiro,Shinohara Hirofumi

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/4242240/4242241/04242478.pdf?arnumber=4242478

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. 3-D Stackable Offset-Via Antifuse by Cu BEOL Process in Advanced CMOS Technologies;IEEE Transactions on Electron Devices;2023-12

2. Review of fuse and antifuse solutions for advanced standard CMOS technologies;Microelectronics Journal;2009-12

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