1. B.-J. Min, K.-W. Lee, H.-J. Lee, S.-R. Kim, S.-G. Oh, B.-G. Jeon, H.-H. Yang, M.-K. Kim, S.-H. Cho, H. Cheong, C. Chung, K. Kim, An embedded non-volatile FRAM with electrical fuse repair scheme and one-time programming scheme for high performance smart cards, in: Custom Integrated Circuits Conference, CICC 2005, IEEE, 2005, pp. 255–258.
2. S. Ohbayashi, M. Yabuuchi, K. Kono, Y. Oda, S. Imaoka, K. Usui, T. Yonezu, T. Iwamoto, K. Nii, Y. Tsukamoto, M. Arakawa, T. Uchida, M. Okada, A. Ishii, H. Makino, K. Ishibashi, H. Shinohara, A 65nm embedded SRAM with wafer-level burn-in mode, leak-bit redundancy and E-Trim fuse for known good die, in: International Solid-State Circuits Conference, ISSCC 2004, Digest of Technical Papers, IEEE, 2007, pp. 488–617.
3. CMOS trimming circuit based on polysilicon fuse;Kim;Electronics Letters,1998
4. J. Raszka, M. Advani, V. Tiwari, L. Varisco, N. Hacobian, A. Mittal, M. Han, A. Shirdel, A. Shubat, Embedded flash memory for security applications in a 0.13um CMOS logic process, in: International Solid-State Circuits Conference, ISSCC 2004, Digest of Technical Papers, vol. 1, IEEE, 2004, pp. 46–512.
5. Novel single polysilicon EEPROM cell with dual work function floating gate;Na;IEEE Electron Device Letters,2007