A 4Gb 2b/cell NAND Flash Memory with Embedded 5b BCH ECC for 36MB/s System Read Throughput

Author:

Micheloni R.,Ravasio R.,Marelli A.,Alice E.,Altieri V.,Bovino A.,Crippa L.,Di Martino E.,D'Onofrio L.,Gambardella A.,Grillea E.,Guerra G.,Kim D.,Missiroli C.,Motta I.,Prisco A.,Ragone G.,Romano M.,Sangalli M.,Sauro P.,Scotti M.,Won S.

Publisher

IEEE

Cited by 22 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 9-Mb HZO-Based Embedded FeRAM With 10-Cycle Endurance and 5/7-ns Read/Write Using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier;IEEE Journal of Solid-State Circuits;2024-01

2. FBEL: Enhanced LLR optimization algorithm based on the VSER prediction by flag bits in the bit-flipping scheme;IEICE Electronics Express;2023-06-10

3. A Universal Maximum Likelihood GRAND Decoder in 40nm CMOS;2022 14th International Conference on COMmunication Systems & NETworkS (COMSNETS);2022-01-04

4. BCH Codes for Solid-State-Drives;Inside Solid State Drives (SSDs);2018

5. SSD Architecture and PCI Express Interface;Inside Solid State Drives (SSDs);2018

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