A 0.9V 0.35¿m Adaptively Biased CMOS LDO Regulator with Fast Transient Response
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/4497158/4523032/04523247.pdf?arnumber=4523247
Cited by 29 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Design of 300nA quiescent current and 300mA load capacity LDO with fast transient response;IEICE Electronics Express;2024-06-25
2. An NMOS output-capacitorless low-dropout regulator with dynamic-strength event-driven charge pump;Journal of Semiconductors;2024-06-01
3. A Fast Transient Response Capless LDO Regulator Achieving -78 dB of PSR Up to 2 MHz;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
4. A Capacitor-Less LDO Regulator Compensated by Adaptive Zero for Zero-Load Stability Enhancement;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
5. An NMOS LDO With TM-MOS and Dynamic Clamp Technique Handling Up To Sub-10-μs Short-Period Load Transient;IEEE Journal of Solid-State Circuits;2024-02
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