Testing Multiple High-Speed Channels using Automated Test Equipment (ATE), SOC 93K, in parallel-Reference-Cited by-同舟云学术

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Testing Multiple High-Speed Channels using Automated Test Equipment (ATE), SOC 93K, in parallel

Published:2021-12-07 Issue: Volume: Page:
ISSN:
Container-title:2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC)
language:
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Author:

Umralkar Ratan Bhimrao,Kangrong Li

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9663571/9663865/09663994.pdf?arnumber=9663994

Reference4 articles.

1. Special Session: Test Challenges in a Chiplet Marketplace

2. Wafer Level Reliability Characterization of 2.5D IC packages

3. Novel Eye Diagram Estimation Technique to Assess Signal Integrity in High-Speed Memory Test

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Dedicated Memory Testing Processor Design;2023 IEEE 16th International Conference on Electronic Measurement & Instruments (ICEMI);2023-08-09

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