A Dedicated Memory Testing Processor Design-Reference-Cited by-同舟云学术

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A Dedicated Memory Testing Processor Design

Published:2023-08-09 Issue: Volume: Page:
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Container-title:2023 IEEE 16th International Conference on Electronic Measurement & Instruments (ICEMI)
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Author:

Deng Kewei¹,Wang Houjun¹,Zhu Ruiqi¹,Chen Shibo¹,Dai Zhijian²

Affiliation:

1. School of Automation Engineering, University of Electronic Science and Technology of China,Chengdu,China

2. Shenzhen Institute for Advanced Study, University of Electronic Science and Technology of China,Longhua District Key Laboratory of Integrated In-circuit testing Technology,Shenzhen,China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10269800/10269827/10270649.pdf?arnumber=10270649

Reference15 articles.

1. A new method for traveling memory address based on vector function

2. A pipelined ALPG for ultra-high speed memory testing;yoon;Korea Test Conference,2007

3. Generation technique of 500 MHz ultra-high speed algorithmic pattern

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A New ISA for High-Speed and Area-Efficient ALPG;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-07

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