New chip-to-wafer 3D integration technology using hybrid self-assembly and electrostatic temporary bonding-Reference-Cited by-同舟云学术

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New chip-to-wafer 3D integration technology using hybrid self-assembly and electrostatic temporary bonding

Published:2012-12 Issue: Volume: Page:
ISSN:
Container-title:2012 International Electron Devices Meeting
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Author:

Fukushima T.,Hashiguchi H.,Bea J.,Ohara Y.,Murugesan M.,Lee K.-W.,Tanaka T.,Koyanagi M.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6471855/6478950/06479157.pdf?arnumber=6479157

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Liquid Surface Tension-Driven Chip Self-Assembly Technology with Cu-Cu Hybrid Bonding for High-Precision and High-Throughput 3D Stacking of DRAM;2024 IEEE 74th Electronic Components and Technology Conference (ECTC);2024-05-28

2. Numerical study on wafer level warpage evolution during chip to wafer hybrid bonding process;2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC);2021-12-07

3. Low-Cost Laser Micromachining Super Hydrophilic–Super Hydrophobic Microgrooves for Robotic Capillary Micromanipulation of Microfibers;Micromachines;2021-07-21

4. High Volume Manufacturing and Field Stability of MEMS Products;Springer Handbook of Nanotechnology;2017

5. Vertical-cavity surface-emitting laser chip bonding by surface-tension-driven self-assembly for optoelectronic heterogeneous integration;Japanese Journal of Applied Physics;2015-01-16

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