First demonstration of FinFET split-gate MONOS for high-speed and highly-reliable embedded flash in 16/14nm-node and beyond
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7824662/7838021/07838393.pdf?arnumber=7838393
Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Area-Efficient Integration of Embedded 0.5F0.5R Hybrid Memory and High Mobility Logic Device on Ge;IEEE Transactions on Electron Devices;2023-10
2. Microscopic physical origin of charge traps in 3D NAND flash memories;Japanese Journal of Applied Physics;2023-02-14
3. Atomic and electronic structures of nitrogen vacancies in silicon nitride: Emergence of floating gap states;Physical Review B;2022-10-25
4. Flash: A “Forgotten” Technology in VLSI Design;Frontiers of Quality Electronic Design (QED);2022-09-06
5. A Novel ASIC Design Flow Using Weight-Tunable Binary Neurons as Standard Cells;IEEE Transactions on Circuits and Systems I: Regular Papers;2022-07
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