Overcoming the reliability limitation in the ultimately scaled DRAM using silicon migration technique by hydrogen annealing

Author:

Ryu Seong-Wan,Min Kyungkyu,Shin Jungho,Kwon Heimi,Nam Donghoon,Oh Taekyung,Jang Tae-Su,Yoo Minsoo,Kim Yongtaik,Hong Sungjoo

Publisher

IEEE

Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Design and analysis of gate all around stacked nanosheet-DRAM for future technology node;Japanese Journal of Applied Physics;2024-01-23

2. Understanding the Competitive Interaction in Leakage Mechanisms for Effective Row Hammer Mitigation in Sub-20 nm DRAM;IEEE Electron Device Letters;2024-01

3. An Experimental Analysis of RowHammer in HBM2 DRAM Chips;2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks - Supplemental Volume (DSN-S);2023-06

4. Effect of Hydrogen Annealing on Performances of BN-Based RRAM;Nanomaterials;2023-05-18

5. Double-sided Row Hammer Effect in Sub-20 nm DRAM: Physical Mechanism, Key Features and Mitigation;2023 IEEE International Reliability Physics Symposium (IRPS);2023-03

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