A 28GHz quadrature fractional-N synthesizer for 5G mobile communication with less than 100fs jitter in 65nm CMOS-Reference-Cited by-同舟云学术

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A 28GHz quadrature fractional-N synthesizer for 5G mobile communication with less than 100fs jitter in 65nm CMOS

Published:2016-05 Issue: Volume: Page:
ISSN:
Container-title:2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
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Author:

El-Halwagy W.,Nag A.,Hisayasu P.,Aryanfar F.,Mousavi P.,Hossain M.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7503233/7508220/07508265.pdf?arnumber=7508265

Cited by 14 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 27-39 GHz Fractional-N PLL For 5G mm-Wave Communication With Improved Extended Range Multi-Modulus Divider;2023 Asia-Pacific Microwave Conference (APMC);2023-12-05

2. Ring-VCO-based phase-locked loops for clock generation – design considerations and state-of-the-art;Chip;2023-06

3. Millimeter-Wave Phased Arrays and Over-the-Air Characterization for 5G and Beyond: Overview on 5G mm-Wave Phased Arrays and OTA Characterization;IEEE Microwave Magazine;2022-05

4. A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter;IEEE Journal of Solid-State Circuits;2022-02

5. A 23.6-38.3GHz Low-Noise PLL with Digital Ring Oscillator and Multi-Ratio Injection-Locked Dividers for Millimeter-Wave Sensing;2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC);2020-08

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