A 5.5-7.3 GHz Analog Fractional-N Sampling PLL in 28-nm CMOS with 75 fsrmsJitter and −249.7 dB FoM-Reference-Cited by-同舟云学术

A 5.5-7.3 GHz Analog Fractional-N Sampling PLL in 28-nm CMOS with 75 fsrmsJitter and −249.7 dB FoM

Published:2018-06 Issue: Volume: Page:
ISSN:
Container-title:2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
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Author:

Wu Wanghua,Yao Chih-Wei,Godbole Kunal,Ni Ronghua,Chiang Pei-Yuan,Han Yongping,Zuo Yongrong,Verma Ashutosh,Lu Ivan Siu-Chuang,Son Sang Won,Cho Thomas Byunghak

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8412655/8428831/08428844.pdf?arnumber=8428844

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