Partially depleted SOI NMOSFET's with self-aligned polysilicon gate formed on the recessed channel region-Reference-Cited by-同舟云学术

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Partially depleted SOI NMOSFET's with self-aligned polysilicon gate formed on the recessed channel region

Published:1997-05 Issue:5 Volume:18 Page:184-186
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Jong-Ho Lee ,Hyung-Cheol Shin ,Jong-June Kim ,Choon-Bae Park ,Young-June Park

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx1/55/12356/00568756.pdf?arnumber=568756

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Chemical bond structure and MOSFET device damages of electron beam cured siloxane spin-on-dielectric films;Electronic Materials Letters;2014-11

2. A new fabrication method for elevated source/drain junctionless transistors;Journal of Physics D: Applied Physics;2013-03-27

3. On the structure of the recessed-channel MOSFET for sub-100 nm Si CMOS;Solid-State Electronics;2001-10

4. Analysis of a Novel Self-Aligned Elevated Source Drain Metal-Oxide-Semiconductor Field-Effect Transistor with Reduced Gate-Induced Drain Leakage Current and High Driving Capability;Japanese Journal of Applied Physics;2000-11-15

5. Highly suppressed short-channel effects in ultrathin SOI n-MOSFETs;IEEE Transactions on Electron Devices;2000

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