On the structure of the recessed-channel MOSFET for sub-100 nm Si CMOS-Reference-Cited by-同舟云学术

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On the structure of the recessed-channel MOSFET for sub-100 nm Si CMOS

Published:2001-10 Issue:10 Volume:45 Page:1805-1808
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Tao Meng,Varahramyan Kody

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference8 articles.

1. Grooved gate MOSFET;Nishimatsu;Jpn J Appl Phys,1977

2. Semiconductor Industry Association, International technology roadmap for semiconductors 1999 edition. 1999

3. Partially depleted SOI NMOSFET's with self-aligned polysilicon gate formed on the recessed channel region;Lee;IEEE Electron Dev Lett,1997

4. Recessed-channel structure for fabricating ultrathin SOI MOSFET with low series resistance;Chan;IEEE Electron Dev Lett,1994

5. Anomalous punchthrough in ULSI buried-channel MOSFET's;Skotnicki;IEEE Trans Electron Dev,1989

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1. TCAD assessment of Gate Electrode Workfunction Engineered Recessed Channel (GEWE-RC) MOSFET and its multi-layered gate architecture, Part II: Analog and large signal performance evaluation;Superlattices and Microstructures;2009-10

2. Effect of contact geometry on 4H-SiC rectifiers with junction termination extension;Solid-State Electronics;2003-01

3. Simulation and Experimental Characteristics of 4H-SiC Schottky Power Rectifiers;Journal of The Electrochemical Society;2003

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