An 8-bit 500 MSPS segmented current steering DAC using Chinese abacus technique-Reference-Cited by-同舟云学术

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An 8-bit 500 MSPS segmented current steering DAC using Chinese abacus technique

Published:2016-05 Issue: Volume: Page:
ISSN:
Container-title:2016 20th International Symposium on VLSI Design and Test (VDAT)
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Author:

Khandagale Sachin,Sarkar Santanu

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8059694/8064831/08064903.pdf?arnumber=8064903

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 12-bit 3-GS/s Tri-Segmented Current Steering DAC with A Complementary Switching Technique;2024 14th International Conference on Electrical Engineering (ICEENG);2024-05-21

2. Design of High Linearity DAC for impedance enhanced current source;2024 4th International Conference on Neural Networks, Information and Communication (NNICE);2024-01-19

3. An 8-bit 3.5 GS/s Current Steering DAC for Wireless Applications;2023 International Microwave and Antenna Symposium (IMAS);2023-02-07

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