An 8-bit 3.5 GS/s Current Steering DAC for Wireless Applications
Author:
Affiliation:
1. Military Technical College,Electronic Engineering Department,Cairo,Egypt
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10066848/10066878/10066935.pdf?arnumber=10066935
Reference18 articles.
1. An 8-bit 500 MSPS segmented current steering DAC using Chinese abacus technique
2. Improved performance 6-bit 3.5 GS/s unary CS-DAC using glitch reduction
3. An 8-Bit Unified Segmented Current-Steering Digital-to-Analog Converter
Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A 12-bit 3-GS/s Tri-Segmented Current Steering DAC with A Complementary Switching Technique;2024 14th International Conference on Electrical Engineering (ICEENG);2024-05-21
2. On the Segmentation of Gigasample Rate Current Steering DACs;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
3. Design of High-Speed Wideband Digital Upconverter;2024 9th International Conference on Electronic Technology and Information Science (ICETIS);2024-05-17
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