Linearized Analysis of Mid-Rise TDCs for Integer-N and Fractional-N Digital PLLs

Author:

Wang Xu1,Kennedy Michael Peter1

Affiliation:

1. University College Dublin,School of Electrical and Electronic Engineering,Dublin,Ireland

Funder

Science Foundation Ireland

Enterprise Ireland

Publisher

IEEE

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Comparison of DTC Segmentation Methods in Fractional-N Frequency Synthesizers;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

2. Comparison of DTC-Related Spurs in Fractional-N Digital PLLs with MASH-and-ENOP-based Divider Controllers;2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2023-12-04

3. Enhanced Jitter Analysis and Minimization for Digital PLLs With Mid-Rise TDCs and its Impact on Output Phase Noise;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-12

4. MMSE Estimator for Linearized Analysis and SNR of ADCs Tested with Sinusoidal Inputs;2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME);2023-06-18

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