Resource Reduction of BFGS Quasi-Newton Implementation on FPGA Using Fixed-Point Matrix Updating
Author:
Liu Jia,Liu Qiang
Cited by
2 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. eSSpMV: An Embedded-FPGA-based Hardware Accelerator for Symmetric Sparse Matrix-Vector Multiplication;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21
2. Edge FPGA-based Onsite Neural Network Training;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21