Author:
Liu Cheng,Ng Ho-Cheung,So Hayden Kwok-Hay
Cited by
31 articles.
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1. SPADES: A Productive Design Flow for Versal Programmable Logic;2023 33rd International Conference on Field-Programmable Logic and Applications (FPL);2023-09-04
2. A Scalable Many-core Overlay Architecture on an HBM2-enabled Multi-Die FPGA;ACM Transactions on Reconfigurable Technology and Systems;2023-01-18
3. Einführung;Blocks: Auf dem Weg zu Energieeffizienten, Grobkörnigen, Rekonfigurierbaren Architekturen (CGRA);2023
4. Technical Difficulties and Development Trend;Software Defined Chips;2022-11-15
5. Reexamining CGRA Memory Sub-system for Higher Memory Utilization and Performance;2022 IEEE 40th International Conference on Computer Design (ICCD);2022-10