Author:
Choi Jongsok,Brown Stephen,Anderson Jason
Cited by
9 articles.
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1. A RISC-V-based FPGA Overlay to Simplify Embedded Accelerator Deployment;2021 24th Euromicro Conference on Digital System Design (DSD);2021-09
2. High-Level Synthesis of Transactional Memory;Proceedings of the 26th Asia and South Pacific Design Automation Conference;2021-01-18
3. Global Analysis of C Concurrency in High-Level Synthesis;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-01
4. A Survey on Performance Optimization of High-Level Synthesis Tools;Journal of Computer Science and Technology;2020-05
5. The Performance of Data Combining Techniques for Cooperative Leach Protocol in WSN Under Fading;Lecture Notes in Electrical Engineering;2019-12-17