High-Level Synthesis of Transactional Memory
Author:
Affiliation:
1. Dept. of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3394885.3431556
Reference20 articles.
1. Andrew Canis Jongsok Choi Mark Aldham Victor Zhang Ahmed Kammoona Jason H Anderson Stephen Brown and Tomasz Czajkowski. 2011. LegUp: high-level synthesis for FPGA-based processor/accelerator systems. In ACM/SIGDA FPGA. 33--36. Andrew Canis Jongsok Choi Mark Aldham Victor Zhang Ahmed Kammoona Jason H Anderson Stephen Brown and Tomasz Czajkowski. 2011. LegUp: high-level synthesis for FPGA-based processor/accelerator systems. In ACM/SIGDA FPGA. 33--36.
2. Oregon Medical Laser Center. [n.d.]. Monte Carlo Simulations. https://omlc.org/software/mc/. Oregon Medical Laser Center. [n.d.]. Monte Carlo Simulations. https://omlc.org/software/mc/.
3. Yu Ting Chen and Jason H Anderson. 2017. Automated generation of banked memory architectures in the high-level synthesis of multi-threaded software. In FPL. Yu Ting Chen and Jason H Anderson. 2017. Automated generation of banked memory architectures in the high-level synthesis of multi-threaded software. In FPL.
4. From software threads to parallel hardware in high-level synthesis for FPGAs
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