Design of Spin-FET Electrical Model for Basic Gates-Reference-Cited by-同舟云学术

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Design of Spin-FET Electrical Model for Basic Gates

Published:2024-05-17 Issue: Volume: Page:1-5
ISSN:
Container-title:2024 IEEE 4th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA)
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Author:

Rajput Priti Jagatsing¹,Bhandari Sheetal U.¹,Khurge Deepti¹

Affiliation:

1. PCCOE, Savitribai Phule Pune Univerity,Department of Electronics & Telecommunication,Pune,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx8/10560064/10560065/10560268.pdf?arnumber=10560268

Reference14 articles.

1. Impact of Scaling on the Performance of HfO2-Based Ferroelectric Field Effect Transistors

2. Sub-10-nm Silicene Nanoribbon Field Effect Transistor

3. Electronic analog of the electro‐optic modulator

4. A Review on—Spintronics an Emerging Technology

5. Spin transport in nanowires

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